1. Field of the Invention
The present invention relates to a Schottky diode having a structure for improving a reverse bias characteristic in particular, and more particularly, it relates to a Schottky diode employed in combination with an insulated gate semiconductor device. It also relates to a technique of protecting an insulated gate semiconductor device.
2. Discussion of the Background
FIG. 16 and FIG. 17 are sectional views showing the structures of conventional Schottky diodes 100 and 101 respectively. In each of the Schottky diodes 100 and 101, an oxide film 35 is selectively formed on an Nxe2x88x92-type semiconductor substrate 11, and a boundary layer 14 called a Schottky region is provided on a surface of the semiconductor substrate 11 not formed with the oxide film 35. The boundary layer 14 can be formed by diffusing platinum into the surface of the semiconductor substrate 11, for example. An anode electrode 51 is in contact with the boundary layer 14 and provided on its upper portion while covering part of the oxide film 35.
In the Schottky diode 101, a P-type impurity region 15 extending over the oxide film 35 and the boundary layer 14 is further provided in the surface of the semiconductor substrate 11. This functions as a guard ring controlling the shape of a depletion layer and preventing an electric field from concentrating to the boundary layer 14 and reducing voltage resistance when a reverse bias is applied to the Schottky diode 101. Hence the voltage resistance of the Schottky diode 101 becomes higher than the voltage resistance of the Schottky diode 100.
In the case of applying a prescribed anode voltage VAK between the anode electrode 51 and the semiconductor substrate 11 as a forward bias, the Schottky diode 100 or 101 forwardly conducts when the anode voltage VAK exceeds a certain threshold. The threshold voltage at this time depends on the barrier height of the formed boundary layer 14. In general, the threshold voltage of a Schottky diode is desirably low for reduction of power consumption, and set to about 0.3 V, for example. In the Schottky diode 101, therefore, the threshold voltage of a P-N junction, which becomes about 0.6 V, formed by the impurity region 15 and the semiconductor substrate 11 does not inhibit the Schottky diode 101 from turning ON.
When applying a voltage becoming a reverse bias between the anode electrode 51 and the semiconductor substrate 11, on the other hand, no current flows in the Schottky diode 100 or 101 up to a breakdown voltage of a junction formed by the boundary region 14 and the semiconductor substrate 11 except a leakage current.
In order to reduce the cost, it is also possible not to form the boundary region 14 in the Schottky diode 100 but form the anode electrode 51 by an aluminum alloy, for example, and employ silicon as the semiconductor substrate 11 for structuring a diode. In this case, aluminum contained in the anode electrode 51 diffuses into the surface of the semiconductor substrate 11, whereby the conductivity type of a region in the semiconductor substrate 11 being in contact with the anode electrode 51 becomes a Pxe2x88x92 type. The barrier height is low as compared with a general diode comprising a P-N junction, whereby the threshold is also small and a diode having characteristics approximate to a Schottky diode can be obtained. A diode of such a structure is tentatively referred to as xe2x80x9cpseudo Schottky diodexe2x80x9d in this specification.
FIG. 18 is a circuit diagram showing the structure of a circuit 400 sensing, when an overcurrent flows in an insulated gate transistor such as an IGBT 21, for example, the current and protecting the IGBT 21. The gate and the collector of a current detection IGBT 22 are connected to the gate and the collector of the IGBT 21 respectively. A power source 23 applying a voltage becoming a forward bias is provided between the collector and the emitter of the IGBT 21. An end of a resistor 24 is connected to the gates of the IGBTs 21 and 22, and the IGBTs 21 and 22 are driven under the control of a driving circuit (not shown) connected to the other end of the resistor 24.
A current detection part 25 is connected between the gate and the emitter of the IGBT 22. The current detection part 25 is formed by a resistor 26, a Schottky diode 27 and a MOSFET 28. The resistor 26 is connected between the emitter of the IGBT 22 and the emitter of the IGBT 21, while the anode of the Schottky diode 27 is connected to the gates of the IGBTs 21 and 22 and the cathode is connected to the drain of the MOSFET 28 respectively. The source of the MOSFET 28 is connected to the emitter of the IGBT 21 and the gate is connected to the emitter of the IGBT 22 respectively.
Regarding the IGBT 21 as a body and the IGBT 22 as that for current detection in general, the two are generally structured in a combined manner. The structure of the circuit 400 in such a case is disclosed in Japanese Patent Laying-Open Gazette No. 8-148675, for example.
Depending on a current flowing in the IGBT 21, a current flows also in the IGBT 22, and the latter current develops a voltage drop in the resistor 26. When this voltage drop exceeds the threshold of the gate of the MOSFET 28, the MOSFET 28 turns on and a current flows from the resistor 24 through the Schottky diode 27 and the MOSFET 28. Hence the gate potential of the IGBT 21 lowers, and it follows that the current flowing therein is suppressed.
Study is now made as to what kind of characteristics to have as the Schottky diode 27. FIG. 19 is a graph showing the relations between anode voltages VAK and logarithmic values log I of currents I flowing in diodes as to a plurality of types of diodes. A graph 91 shows the characteristic of a diode (hereinafter tentatively referred to as xe2x80x9cP-N junction diodexe2x80x9d) formed by a P-N junction, a graph 92 shows the characteristic of the Schottky diode 100 and the graph 93 shows the characteristic of the pseudo Schottky diode respectively.
The characteristic of the Schottky diode 101 is shown by synthesis of the graph 92 in a region where the anode voltage VAK is lower than branching of a curve 90 shown by a broken line, the curve 90 and the graph 91 in a region where the anode voltage VAK is higher than joining of the curve 90. The reason why the characteristic of the Schottky diode 101 is shown by such a synthesized graph is that the P-N junction formed by the impurity region 15 and the semiconductor substrate 11 does not conduct but is substantially equal to the characteristic of the Schottky diode 100 in a region where the anode voltage VAK is relatively small while this P-N junction forwardly conducts and the characteristic of the diode formed by the P-N junction in which a large current flows becomes dominant in the region where the anode voltage VAK is relatively small.
FIG. 20 is a graph showing a current flowing in the IGBT 21 and a voltage generated between its collector and emitter in the case of employing the Schottky diode 100 as the Schottky diode 27 of the circuit 400 shown in FIG. 18, and units are arbitrary as to both of the current and the voltage. There is shown that a clamp operation as to the current flowing in the IGBT 21 is performed and protection against an overcurrent is normally performed. Both of FIG. 21 and FIG. 22 show operation characteristics of the circuit 400 in the case of employing a pseudo Schottky diode as the Schottky diode 27 and the case of employing the Schottky diode 101 as the Schottky diode 27, and correspond to FIG. 20. There is shown that an oscillation phenomenon takes place although a clamp operation is performed as to the current in each case.
The pseudo Schottky diode and the Schottky diode 101 comprise P-N junctions dissimilarly to the Schottky diode 100. Therefore, it is conceivable that, when a voltage of at least about 0.6 V is applied, the injection rate of holes increases as compared with the Schottky diode 100 and a delay takes place in the operation of the MOSFET 28. It is conceivable that this operation delay of the MOSFET 28 causes the aforementioned oscillation phenomenon.
Thus, when employing the Schottky diode 27 from the conventional Schottky diode, there has been present such a trade-off relation that it is desirable to select the Schottky diode 100 in view of causing no oscillation although it is desirable to select the Schottky diode 101 in the point of voltage resistance in reverse bias application.
In the protection circuit disclosed in Japanese Patent Laying-Open Gazette No. 8-148675, there is shown a structure directly placing an aluminum film on an Nxe2x88x92 layer as an element corresponding to the Schottky diode 27 of the circuit 400.
The present invention aims at solving the aforementioned problems and providing a Schottky diode having a structure improving voltage resistance against a reverse bias without having a P-N junction. Further, it also aims at providing a technique making oscillation hardly occur in overcurrent protection of an insulated gate transistor.
A first aspect of a semiconductor device according to the present invention comprises a first semiconductor layer of a first conductivity type, an insulated gate semiconductor device having a second semiconductor layer of a second conductivity type having a surface exposed on a surface of the first semiconductor layer for functioning as a channel region, a gate insulator film provided on the first and second semiconductor layers and a gate electrode provided on the gate insulator film, a Schottky diode having a Schottky region formed in the surface of the first semiconductor layer and an electrode provided on the Schottky region, and an insulator film having a first end portion crowned with the gate electrode continuously with an end portion of the gate insulator film on a side far from the channel region with its film thickness increasing as going away from the channel region and a second end portion crowned with the electrode on an end portion of the Schottky region with its film thickness increasing as going away from the Schottky region.
A second aspect of the semiconductor device according to the present invention is the first aspect of the semiconductor device, and the first semiconductor layer functions as a drain of the insulated gate semiconductor device and a cathode of the Schottky diode.
A third aspect of the semiconductor device according to the present invention is the first aspect of the semiconductor device, and the electrode has a barrier metal on a portion coming into contact with the Schottky region.
A fourth aspect of the semiconductor device according to the present invention is the first aspect of the semiconductor device, and each of the first and second end portions has a taper of not more than 50 degrees.
A fifth aspect of the semiconductor device according to the present invention is the first aspect of the semiconductor device, and the insulator film has a flat portion between the first end portion and the second end portion, the gate electrode is extended from the gate insulator film toward the flat portion via the first end portion, and the electrode is extended from the second end portion toward the flat portion.
A sixth aspect of the semiconductor device according to the present invention is the first aspect of the semiconductor device, and the insulator film encloses the Schottky region.
A seventh aspect of the semiconductor device according to the present invention is the sixth aspect of the semiconductor device, and the gate electrode encloses the Schottky region.
An eighth aspect of the semiconductor device according to the present invention is the first aspect of the semiconductor device, and the insulated gate semiconductor device is a double diffusion insulated gate semiconductor device.
A ninth aspect of the semiconductor device according to the present invention is the eighth aspect of the semiconductor device, and the insulated gate semiconductor device further has a third semiconductor layer of the first conductivity type provided in the surface of the second semiconductor layer for functioning as a source of the insulated gate semiconductor device, while the third semiconductor layer is connected with the gate electrode through a resistor.
A first aspect of a method of manufacturing a semiconductor device according to the present invention comprises (a) a step of preparing a first semiconductor layer of a first conductivity type, (b) a step of forming a second semiconductor layer of a second conductivity type having a surface exposed on a surface of the first semiconductor layer for functioning as a channel region and a gate insulator film on the first and second semiconductor layers, (c) a step of forming a gate electrode on the gate insulator film for forming an insulated gate semiconductor device having the gate electrode and the first and second semiconductor layers, (d) a step of forming a Schottky region in the surface of the first semiconductor layer, (e) a step of forming an electrode on the Schottky region for forming a Schottky diode having the electrode and the Schottky region, and (f) a step of forming an insulator film having a first end portion whose film thickness increases as going away from the channel region in continuation with an end portion of the gate insulator film on a side far from the channel region and a second end portion whose film thickness increases as going away from the Schottky region on an end portion of the Schottky region in advance of the steps (c) and (d).
A second aspect of the method of manufacturing a semiconductor device according the present invention is the first aspect of the method of manufacturing a semiconductor device, and the step (d) has (d-1) a step of introducing an impurity into the surface of the first semiconductor layer (11) while employing the insulator film as a mask.
A third aspect of the method of manufacturing a semiconductor device according to the present invention is the first aspect of the method of manufacturing a semiconductor device, and the step (e) further comprises (e-1) a step of forming a barrier metal on the Schottky diode.
A fourth aspect of the method of manufacturing a semiconductor device according to the present invention is the first aspect of the method of manufacturing a semiconductor device, and the step (f) has (f-1) a step of forming an insulator on the first semiconductor layer, (f-2) a step of forming positive resist on the insulator, (f-3) a step of opening the positive resist by photolithography, and (f-4) a step of obtaining the insulator film by etching the insulator while employing the positive resist as a mask.
A fifth aspect of the method of manufacturing a semiconductor device according to the present invention is the first aspect of the method of manufacturing a semiconductor device, and the insulator film is formed by a LOCOS method in the step (f).
A first aspect of a semiconductor device protection circuit according to the present invention is a protection network protecting an insulated gate semiconductor device having a body including a control electrode and first and second current electrode currents and a detection element including a control electrode connected to the control electrode of the body and a first current electrode connected to the first current electrode of the body and a second current electrode, and characterized in that it comprises a Schottky diode having an anode connected to the control electrodes of the body and the detection element in common and a cathode, an insulated gate transistor having a first current electrode connected to the cathode, a second current electrode connected to the second current electrode of the body and a control electrode connected to the second current electrode of the detection element, and a resistor connected between the control electrode and the second current electrode of the insulated gate transistor, and the Schottky diode has no P-N junction part.
A second aspect of the semiconductor device protection circuit according to the present invention is the first aspect of the semiconductor device protection circuit, and characterized in that the Schottky diode has a semiconductor layer functioning as the cathode, a Schottky region provided in a surface of the semiconductor layer and an anode electrode electrically connected to the Schottky region, and further has a barrier metal intervening between the anode electrode and the Schottky region.
A third aspect of the semiconductor device protection circuit according to the present invention is the first aspect of the semiconductor device protection circuit, and characterized in that the Schottky diode has a semiconductor layer functioning as the cathode, a Schottky region provided in a surface of the semiconductor layer and an anode electrode provided on the Schottky region, and the anode electrode separates from the semiconductor layer as going away from the Schottky region in a plane perpendicular to the thickness direction of the semiconductor layer.
A fourth aspect of the semiconductor device protection circuit according to the present invention is the first aspect of the semiconductor device protection circuit, and characterized in that the insulated gate semiconductor device is an IGBT.
A fifth aspect of the semiconductor device protection circuit according to the present invention is the first aspect of the semiconductor device protection circuit, and characterized in that the control electrode has a trench structure.
According to the first, second and fifth to ninth aspects of the inventive semiconductor device, both of the gate electrode of the insulated gate semiconductor device and the electrode of the Schottky diode serve functions as field plates, whereby voltage resistance against a voltage becoming a reverse bias to the Schottky diode enlarges. Further, the insulator film having a taper so that both of these two electrodes serve the functions of the field plate may sufficiently be one.
According to the third aspect of the inventive semiconductor device, the electrode of the Schottky diode has the barrier metal in the portion coming into contact with the Schottky region, whereby, even if forming the anode electrode by a material having an impurity changing the conductivity type of the semiconductor substrate to the semiconductor substrate, the barrier metal prevents the impurity from being introduced into the semiconductor device, and hence no P-N junction is formed in the Schottky diode. Hence, it causes no oscillation phenomenon also when employed for the protection circuit.
According to the fourth aspect of the inventive semiconductor device, the angles of the tapers on the first and second end portions are small, whereby large voltage resistance can be obtained.
According to the first and second aspects of the inventive method of manufacturing a semiconductor device, the first aspect of the inventive semiconductor device can be obtained.
According to the third aspect of the inventive method of manufacturing a semiconductor device, the third aspect of the inventive semiconductor device can be obtained.
According to the fourth and fifth aspects of the inventive method of manufacturing a semiconductor device, the shapes of the first and second end portions of the insulator film of the first aspect of the inventive semiconductor device can be tapered.
According to the first, fourth and fifth aspects of the inventive semiconductor device protection circuit, the Schottky diode has no P-N junction part dissimilarly to a Schottky diode provided with a guard ring or a pseudo Schottky diode, whereby no oscillation phenomenon takes place when suppressing a current flowing in the body.
According to the second aspect of the inventive semiconductor device protection circuit, the barrier metal can suppress introduction of an impurity into the Schottky region and inhibit formation of a P-N junction in the Schottky diode.
According to the second aspect of the inventive semiconductor device protection network, the electrode of the Schottky diode functions as a field plate, whereby voltage resistance of the semiconductor protection network can be improved.